Atmel AVR 32-bit Architecture Manual

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( file size: 5108318 , 377 pages , revision D , updated: 04/2011 )

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A complete system-on-chip 32-bit AVR microcontroller. It is designed for cost-sensitive embedded applications that require low power consumption, high code density and high performance.

The microcontroller's Memory Protection Unit (MPU) and fast, flexible interrupt controller support the latest real-time operating systems. Higher computation capabilities are achievable using a rich set of DSP instructions. The device incorporates on-chip flash and SRAM memories for secure and fast access. 64 KBytes of SRAM are directly coupled to the 32-bit AVR UC3 for performance optimization. Two blocks of 32 Kbytes SRAM are independently attached to the high speed bus matrix for real ping-pong management.

The microcontroller achieves exceptionally high data throughput by combining the multi-layered 32-bit AVR databus,128 KB on-chip SRAM with triple high speed interfaces, multi-channel peripheral, memory-to-memory DMA controller, high-speed USB embedded host, SD/SDIO card, MLC NAND flash with ECC, and SDRAM interfaces.

This device features 256KB internal high-speed flash, built-in hi-fi stereo audio D/A converter and full-duplex multi-channel I2S audio interface.

The AT32UC3A3256AU is the Audio version of the AT32UC3A3256. It allows the execution of Atmel licensed Audio firmware IPs.

One version is available:

  • AT32UC3A3256AU-ALUT: LQFP144, industrial (-40°C to +85°C), tray conditioning.

Key Parameters


Flash (Kbytes):

256 Kbytes

Pin Count:


Max. Operating Freq. (MHz):

66 MHz


32-bit AVR

# of Touch Channels:


Hardware QTouch Acquisition:


Max I/O Pins:


Ext Interrupts:


USB Transceiver:


USB Speed: