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Highly integrated, high-performance 32-bit RISC embedded processor based on the SPARC V8 architecture. Its implementation is based on the European Space Agency LEON2 fault tolerant model. By executing powerful instructions in a single clock cycle, this processor achieves throughputs approaching 1MIPS per MHz. This allows the system designer to optimize power consumption against processing speed.It is designed to be used as a building block in computers for on-board embedded real-time applications. It provides up-to-date functionality and performance for space application. It only requires memory and application specific peripherals to be added to form a complete on-board computer.
