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Datasheet

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Software

Description

SAM4C Series

SAM4C Series Complete

(file size: 5.4 MB, 1303 pages, revision E, updated: 10/2014)
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The Atmel®| SMART SAM416C microcontroller is a system-on-chip solution for smart energy applications built around two high performance 32-bit ARM® Cortex®-M4 RISC processors. These devices operate at a maximum speed of 120 MHz and feature 1024 Kbytes of embedded Flash, 152 Kbytes of SRAM and on-chip cache for each core. The dual ARM® Cortex®-M4 architecture allows for integration of application layer, communications layers and security functions in a single device, with the ability to extend program and data memory via a 16-bit external bus interface.

Key Features

  • Application / Master Core
    • ARM Cortex-M4 running at up to 120MHz
    • Memory Protection Unit (MPU)
    • DSP Instruction
    • Thumb®-2 instruction set
    • Instruction and Data Cache Controller with 2 Kbytes Cache Memory
    • 1024kbytes of flash, 128Kbytes of SRAM, 8Kbytes of ROM
  • Coprocessor (provides ability to separate application, communication or metrology functions)
    • ARM Cortex-M4F
    • IEEE 754 Compliant, Single precision Floating-Point Unit (FPU)
    • DSP Instruction
    • Thumb-2 instruction set
    • Instruction and Data Cache Controller with 2 Kbytes Cache Memory
    • 16K+8K bytes of SRAM
  • Symmetrical/Asynchronous Dual Core Architecture
    • Interrupt-based Inter-processor Communication
    • Asynchronous Clocking
    • One Interrupt Controller (NVIC) for each core
    • Each Peripheral IRQs routed to each NVIC Inputs
  • Cryptography
    • High performance AES 128 to 256 with various modes (GCM, CBC, ECB, CFB, CBC-MAC, CTR)
    • TRNG (up to 38 Mbit/s stream, with tested Diehard and FIPS)
    • Public Key Crypto accelerator and associated ROM library for RSA, ECC, DSA, ECDSA
    • Integrity Check Module (ICM) based on Secure Hash Algorithm (SHA1, SHA224, SHA256), DMA assisted
  • Safety
    • Up to four physical Anti-tamper Detection I/Os with Time Stamping and Immediate Clear of General Backup Registers
    • Security Bit for Device Protection from JTAG Accesses
  • Shared System Controller
    • Power Supply
      • Embedded Core and LCD Voltage Regulator for single supply operation
      • Power-on-Reset (POR), Brownout Detector (BOD) and Dual Watchdog for safe operation
      • Ultra-low-power Backup mode (< 0.5 µA Typical @ 25°C)
    • Clock
      • Optional 3 to 20 MHz quartz or ceramic resonator oscillators with clock failure detection
      • Ultra-low-power 32.768 kHz crystal oscillator for RTC with frequency monitoring
      • High-precision 4/8/12 MHz factory-trimmed internal RC oscillator with on-the-fly trimming capability
      • One high-frequency PLL up to 240 MHz, one 8 MHz PLL with internal 32 kHz input
      • Low-power slow clock internal RC oscillator as permanent clock
    • Ultra-low-power RTC with Gregorian and Persian Calendar, Waveform Generation and Clock Calibration
    • Up to 23 Peripheral DMA (PDC) Channels
  • Shared Peripherals
    • One Segmented LCD Controller
      • Display capacity of 50 segments and 6 common terminals
      • Software-selectable LCD output voltage (Contrast)
      • Can be used in Backup mode
    • Up to five USARTs with ISO7816, IrDA®, RS-485, SPI and Manchester Mode
    • Two 2-wire UARTs
    • Two 400 kHz Master/Slave and Multi-Master Two-wire Interfaces (I2C compatible)
    • Up to seven Serial Peripheral Interfaces (SPI)
    • Two 3-channel 16-bit Timer/Counters with Capture, Waveform, Compare and PWM modes
    • Quadrature Decoder Logic and 2-bit Gray Up/Down Counter for Stepper Motor
    • 4-channel 16-bit Pulse Width Modulator
    • 32-bit Real-time Timer
  • Analog Conversion Block
    • 8-channel, 500 kS/s, Low-power, 10-bit SAR ADC with Digital averager providing 12-bit resolution at 30 kS/s
    • Software Controlled On-chip Reference ranging from 1.6V to 3.4V
    • Temperature Sensor and Backup Battery Voltage Measurement Channel
  • I/O
    • Up to 74 I/O lines with External Interrupt Capability (edge or level sensitivity), Schmitt Trigger, Internal Pull-up/pull-down, Debouncing, Glitch Filtering and On-die Series Resistor Termination
  • Package
    • 100-lead LQFP, 14 x 14 mm, pitch 0.5 mm

Key Parameters

Parameter
Value

Flash (Kbytes):

1024 Kbytes

SRAM (Kbytes):

152

Max I/O Pins:

74

External Bus Interface:

16-bit data

Timers:

6

PWM Channels:

4

UART:

7

SPI:

7

TWI (I2C):

2

ADC Resolution (bits):

10

 

Ordering Codes

Ordering Code Package Speed Power Supply Operational Range Comment Buy Online Samples
ATSAM4C16CA-AU LQFP R-LQ100_R 100 Buy Request
ATSAM4C16CA-AUR LQFP R-LQ100_R 100 Buy Request
ATSAM4C16CB-AU Buy Request
ATSAM4C16CB-AUR Buy Request