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| FPSLIC devices combine 10K gates of Atmel's patented AT40K FPGA architecture, a 20 MIPS AVR 8-bit RISC microprocessor core, numerous fixed microcontroller peripheries and up to 36K Bytes of program and data SRAM. |
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AT94K05/10/40AL Summary
(5 pages, revision I, updated 1/08)
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AT94K05/10/40AL
(204 pages, revision I, updated 1/8)
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16-bit Arithmetic
(3 pages, updated 4/01)
This Application Note lists program examples for arithmetic operation on 16-bit values.
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2-Wire Serial Macros
(4 pages, updated 4/01)
The 2-wire serial macros provide a simple method for setting the 2-wire serial features on the AT94K device.
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Accessing 16-bit I/O Registers
(4 pages, updated 11/00)
This Application Note explains how to access the 16-bit I/O registers from the FPSLIC-AVR Core using the in and out instructions.
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Accessing the Dual-port SRAM Block from the FPGA Side of the FPSLICŪ
(5 pages, updated 7/05)
This application note provides sesigners with an understanding of how to access and achieve optimal performance from the Shared Dual-port SRAM block from the FPGA side of the FPSLIC.
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AT94K Series Configuration
(38 pages, updated 8/01)
Configuration is the process by which a design is loaded into an AT94K FPSLIC device. AT94K Series devices are SRAM based and can be configured any number of times.
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AT94K, FPSLIC Interrupt Macros
(6 pages, updated 4/01)
Interrupt macros provide customers with a simple method for enabling/disabling interrupts.
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 Other Related Application Notes |
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ATDH40M |
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ATSTK594 |
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See more FAQs |
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Reconfigurable System on a Programmable Chip Platform
(Article, 4 pages, updated 02/05)
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Simplified Ethernet Stack Core or, How to Reduce System Cost
(Article, 2 pages, updated 02/05)
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