AT91RM9200

The AT91RM9200 microcontroller offers a flexible configuration of on- and off-chip memories together with an extensive set of peripherals for control, communication and data storage purposes. It is based on the ARM920T 200-MIPS advanced 32-bit RISC processor with 16K byte instruction and 16K byte data cache memories. It features 16K bytes of on-chip SRAM and 128K bytes of ROM, together with an external bus interface with controllers for SDRAM and static memories including NAND Flash and CompactFlash.

Its extensive peripheral set includes USB Full Speed Host and Device Ports, 10/100 Base T Ethernet MAC, Multimedia Card Interface (MCI), three Synchronous Serial Controllers (SSC), four USARTs, Master/Slave Serial Peripheral Interface (SPI), Timer Counters (TC) and Two Wire Interface (TWI). Four 32-bit Parallel I/O Controllers multiplex the pins to/from these peripherals in order to reduce the device pin count, and peripheral DMA channels maximize the data throughput between these interfaces and the on- and off-chip memories.

The AT91RM9200 has a fully featured system controller for efficient system management, including two on-chip oscillators and PLLs, clock generator, advanced interrupt controller (AIC), debug unit (DBGU), periodic interval timer, watchdog timer and real-time clock with alarm interrupt. It is supplied in a 208-pin PQFP or 266-ball BGA package.

The AT91RM9200 is supported by the AT91RM9200-EK Evaluation Board and extensive third-party application development tools. It supports both Linux and Windows CE. It targets applications requiring enhanced performance such as host processors for system control and connectivity. Examples include telematics systems connecting GPS receivers and GPRS communications, industrial automation, medical systems and point-of-sales terminals.