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AT89LP4052
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4-Kbyte In-system Flash -- Single-Cycle Microcontroller, 256 Bytes RAM, SPI, PWM, 20 MIPS Throughput at 20 MHz.

2K version: AT89LP2052
Flash (Kbytes) 4
ISP SPI
RAM (Bytes) 256
F.max (MHz) 20
Vcc (V) 2.4-5.5
I/O Pins 15
   TSSOP 20
 SOIC 20
 PDIP 20
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View Related Documents and Tools
Distributor InventoryCheck Distributor Inventory
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AT89LP2052/4052 (94 pages, revision J, updated 10/09)
AT89LP2052/4052 Rev. C Errata (2 pages, revision B, updated 6/05)
 
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AVR186: Best practices for the PCB layout of Oscillators (4 pages, revision A, updated 3/08)
This application note provides guidelines to design the PCB layout in order not to risk failure and unstable oscillator operation.
AT89LP In-System Programming Specification (28 pages, revision A, updated 07/06)
AT89LP2052/4052 Primer (18 pages, revision A, updated 1/07)
Migrating from AT89C2051/C4051 to AT89LP2052/LP4052 (8 pages, revision B, updated 5/08)
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Development Software: AT89ISP
Software Files: LP51 Include Files for IAR, Keil, Raisonance, Tasking & SDCC Compilers
 
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AT89ISP
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8051 Single Cycle Core Microcontrollers (Flyer, 2 pages, revision B, updated 07/06)
AT89LP family consists of high performance 8-bit microcontrollers that execute most instructions in a single clock cycle, whereas the classic 8051CPU requires 12 clock cycles.
Single Cycle 8051 Core – AT89LP Family of High Performance & Low Power Flash Micrcocontrollers (White Paper, 8 pages, revision B, updated 06/06)