AVR XMEGA

Real-time Performance, High Integration and Ultra-low Power

Atmel® AVR® XMEGA® microcontrollers deliver the best possible combination of real-time performance, high integration and low power consumption for 8/16-bit MCU applications.

Read the Atmel AVR XMEGA Technical Details.

Key Features

• High-precision analog — 12-bit ADCs with gain stage and combined throughput of 4 MSPS. Fast 12-bit DAC with high drive strength, as well as other functions that reduce the need for external components.
• Real-time performance — The event system facilitates inter-peripheral signaling with 100% predictable response time. To offload the CPU, all peripherals can use DMA for data transfer.
• Atmel picoPower® technology — True 1.6 volt operation, and 500 nA RTC operation with full SRAM retention for fastest possible wake-up time.
• High Integration — XMEGA devices integrate AES and DES crypto modules, up to 32 PWM outputs, 8 UART, 4 TWI (I2C) and 4 SPI channels, a CRC generator module, and more.
• AVR Software Library — A complete library of device drivers and communication stacks save time and development effort so you can focus on more important design tasks.
• Atmel QTouch® Sensing — QTouch Library support enables you to easily realize robust capacitive touch sensing interfaces for button, sliders and wheels.
• USB Connectivity — Delivers full-speed operation without the need for external crystals, 31 endpoints, and a special multi-packet function that maximizes data transfer rates while minimizing CPU load.

Atmel AVR XMEGA Technical Details

 Learn more about the AVR XMEGA Features.

Pin and Memory Options

Pins	Memory
	Flash	SRAM	EEPROM
100-pin	64+4Kbytes 128+8Kbytes	4Kbytes 8Kbytes	2Kbytes 2Kbytes
64-pin	64+4Kbytes 128+8Kbytes 192+8Kbytes 256+8Kbytes	4Kbytes 8Kbytes 16Kbytes 16Kbytes	2Kbytes 2Kbytes 2Kbytes 4Kbytes
44-pin	64+4Kbytes 32+4Kbytes 64+8Kbytes 128+8Kbytes	2Kbytes 4Kbytes 4Kbytes 8Kbytes	1Kbytes 1Kbytes 2Kbytes 2Kbytes

Analog and Digital Converters

Atmel® AVR® XMEGA® devices employ advanced analog-to-digital converters (ADCs) that deliver both high speed and high resolution. These ADCs offer up to four conversion channels with different result registers, which can have different setup and configuration. This provides easier use since different software modules can access and use an ADC independently.

1 or 2 ADCs in each device

• 12-bit resolution
• Up to 2 MSPS per ADC
• Built-in gain stage
• Differential and single-ended input
• Integrated temperature sensor

• 0 – 4 DAC channels in each device
• 12-bit resolution
• Up to 1MSPS per DAC channels

Can drive:

• Pure capacitive load
• Pure resistive load
• Combined load
• 10 mA output drive strength

The ADC and DAC can use both accurate internal and external reference options. Reference buffers inside AVR XMEGA devices eliminate the need for high output current from the external reference.

Event System

The event system facilitates inter-peripheral signaling for short and 100% predictable response time. This ensures real-time control, and also offloads the CPU because each time an event is used, one interrupt with context switch is eliminated. The figure below and to the left shows the traditional approach—where the peripherals interrupt the CPU when they need to signal something. The figure below and to the right shows the AVR XMEGA approach—where the event system offloads these tasks from the CPU. Most of the peripherals and the DMA controller are connected to the event system.

DMA Controller

The AVR XMEGA 4-channel Direct Memory Access (DMA) Controller can be used for fast, CPU-independent data transfer between any combination of data memory and peripherals:

• Peripheral <-> Memory
• Peripheral <-> Peripheral
• Memory <-> Memory

It offers channel priority selection, several addressing modes, and double buffering capabilities. The DMA Controller is particularly useful for all data-oriented applications such as signal collection and processing, industrial control, and communication gateways. It can also offer benefits in other applications because it significantly reduces the CPU load for data transfer, as shown in the table below:

Atmel AVR CPU

Atmel AVR XMEGA devices use the Atmel AVR CPU. The instruction set and design of the CPU are tuned to minimize code size and maximize execution speed. Its true single-cycle execution of arithmetic and logic operations means XMEGA microcontrollers perform close to 1 MIPS per MHz. The fast-access register file with 32 x 8-bit general-purpose working registers is directly connected to the Arithmetic Logic Unit. During a single clock cycle the ALU can be fed two arbitrary registers, do a requested operation, and write back the result. It provides efficient support for 8-, 16-, and 32-bit arithmetic.

Atmel picoPower Technology

Atmel picoPower® technology enables AVR XMEGA devices to deliver true 1.6 Volt operation, which means all functions—including the ADC and DAC, Flash and EEPROM memory programming operate down to 1.6V. This allows safe operation directly from a 1.8V ±10% power supply. It also enables deeper battery discharge to increase battery life. 

 

AVR XMEGA devices consume only 100 nA while maintaining full data retention. This reduces power consumption for applications spending most time in sleep mode, and ensures fast wake-up from all sleep modes.
The AVR XMEGA Real Time Counter consumes only 500 nA while running from a 32.768kHz Crystal Oscillator.
For more information, view the picoPower lab video

USB Connectivity

Selected Atmel AVR XMEGA devices include a full-speed USB device module. This module provides 31 fully configurable endpoints and supports all four USB transfer modes (control, interrupt, isochronous and bulk). It also offers a unique multi-packet function that reduces CPU load and provides higher data rates. A 1100KB/s data rate can be maintained with only 7% CPU load. The high-precision internal oscillator eliminates the need for the external crystal traditionally required for full-speed USB. The AVR Software Framework includes free software for all the most common USB device classes.

USB Performance

UART, SPI, I2C and EBI Communication Interfaces

All AVR XMEGA devices include USART, SPI and I2C interfaces. They can be used with the DMA Controller, the AES and DES cryptographic module and CRC module to offer fast, reliable and secure communication with low CPU load. In addition, the 100-pin device versions have an External Bus Interface (EBI) to connect more data memory or memory mapped external hardware. Key features include:

USART – Universal Synchronous and Asynchronous serial Receiver and Transmitter

• Between 3 and 8 USARTs in each device
• Full asynchronous and clocked synchronous operation
• Fractional BAUD Rate Generator that eliminates the need for external crystal
• IrDA modulation<
• Up to 4 Mbps data rate

SPI – Serial Peripheral Interface

• Between 2 and 4 SPIs in each device
• Fast full-duplex synchronous serial communication
• Master and Slave operation
• Up to 16 Mbps data rate

TWI - Two-Wire Interface

• Between 2 and 4 TWIs in each device
• I2C and SMBus compatible
• Master and Slave operation
• Slave operation and wake-up from address match from all sleep modes
• 100 kHz and 400 kHz support

EBI - External Bus Interface for easy access to

• Up to 128 Mbit of SRAM
• Up to 16 Mbytes of SDRAM
• External peripherals (e.g., LCDs)
• Memory-mapped devices

16-bit Timer/Counters with Compare and Capture Channels

All Atmel AVR XMEGA Timer/Counter modules include Pulse Width Modulation (PWM) and input capture functionality. There are up to eight Timer/Counters and 32 PWM channels in one device. Using a High-Resolution Extension module it is possible to achieve PWM resolution down to 4 nS. The Timer/Counters also support more advanced uses that include PWM with high and low side output and dead-time insertion, and fault protection modes. The input capture function includes pulse width and frequency measurements, and when two 16-bit timer/counters are cascaded this also enables 32-bit input capture.

I/O Pin Functions

Atmel AVR XMEGA devices offer flexible I/O pin configuration with various output configurations, sensing, and synchronous/asynchronous wake-up. The optional Slew-Rate limitation reduces EMI. Virtual ports registers allow single-cycle pin manipulation. This makes software for bit-banging smaller and faster.
The I/O pins comply with the LV-TTL specification, and they offer high drive strength with up to 10mA/20mA source/sink current.

AES and DES Crypto Engine

The cryptographic engine supports 64-bit DES and 128-bit AES encryption and decryption. This capability means that encrypted communication can be done much faster than in software, and as the table below shows it enables high encrypted communication data rates.

 

Max encrypted communication rate	UART	SPI	Vs. Software
128-bit AES	4 Mbps	3.2 Mbps	10x faster
Triple-DES	3.2 Mbps	2.3 Mbps	100x faster

Clock and Power Management

The Atmel AVR XMEGA clock system includes accurate internal oscillators, as well as external crystal and clock options. Dynamic clock switching and clock scaling can be done to tune accuracy and power consumption to fit the application needs. With a built-in external oscillator failure detection and automatic run-time calibration of the internal oscillators, the AVR XMEGA offers a safe, reliable and flexible clock system.

AVR XMEGA devices has five different sleep modes to turn off unused modules and reduce the power consumption in the application. This granularity is further enhanced by the Power Reduction Registers.
In idle sleep mode all peripherals operate while the CPU is sleeping to reduce power consumption. The enables up to a 50% reduction in power consumption while the event system, DMA Controller and all peripherals still operate.
XMEGA devices offer industry-leading low power numbers in power-save mode, using only 600 nA to run the Real Time Counter and provide full data retention. Full data retention is important because it enables a short wake-up time of only 5uS from the deepest sleep mode.
In power-down mode, XMEGA devices use only 100 nA with SRAM and register retention, and 5us wake-up time from pin change on any I/O pin, TWI address match, and USB resume. Safety functions like Watchdog and Brown-out Detection can be optionally enabled in all sleep modes.

Standby and extended standby sleep modes are identical to power-down and power-save, except the external oscillator is kept running to reduce wake-up time

Interrupt Controller

The multi-level interrupt controller has three priority levels. The higher-level interrupts are prioritized and executed before lower-level interrupts. This ensures predicable real-time response for all critical tasks. All peripherals can be assigned any interrupt level.

Analog Comparators

The Analog Comparator (AC) compares the voltage level on two inputs and gives a digital output based on this comparison. Two important properties of the AC are hysteresis and propagation delay. In AVR XMEGA devices, both of these parameters can be adjusted in order to find the optimal operation for each application. The input selection includes analog port pins, several internal signals, including a 64-level programmable voltage scaler. Each device contains at least two analog comparators, which can be configured together in a window mode. In window mode, is it possible to control whether a signal is above, below, inside or outside a voltage window.

Capacitive Touch Sensing

The Atmel QTouch® Library provides a simple-to-use solution for realizing touch sensitive interfaces on AVR XMEGA devices. AVR XMEGA provides up to 64 sense channels for capacitive buttons, sliders and wheels. Touch sensing can be added to any application by linking the appropriate QTouch Library for the AVR XMEGA microcontroller. This is done by using a simple set of APIs to define the touch channels and sensors, and then calling the touch-sensing APIs to retrieve the channel information and determine the touch sensor states. 
 

You can download the QTouch Library free of charge from the Atmel website: www.atmel.com/qtouchlibrary.

CRC Module

Cyclic Redundancy Check (CRC) is an error detection technique test algorithm used to detect accidental errors on data. The CRC module in AVR XMEGA devices supports two commonly used CRC polynomials: CRC-16 (CRC-CCITT) and CRC-32 (IEEE 802.3). It can be used to determine the correctness of communication data , as well as data present in the data memory and program memory. Combined with the DMA controller, it enables continuous and fully autonomous CRC checks on communication data.

RTC with Optional Battery Backup System

The Real Time Counter (RTC) runs continuously, including in low-power sleep modes, to keep track of time. It can wake up the device from sleep modes and/or interrupt the device at regular intervals. It is optimized for low power consumption and uses only 500 nA to keep the RTC and an external 32.768kHz crystal oscillator running
Some applications require that the real-time clock also keeps running in the event of a main power loss. Selected AVR XMEGA devices integrate a battery backup system that automatically performs power switching between main power and battery backup power, and this feature also keeps the RTC running when the main power fails. No external RTC devices or power switch components are required.

Power and System Supervision

All AVR XMGA devices offer various dedicated functions that can and should be used to ensure safe and reliable operation.
Power-on Reset (POR) ensures proper power on and power down cycling for the device. It works when the supply voltage is very low, and makes sure the device is reset before RAM and register content is lost.
Brown-out Detection (BOD) monitors the supply voltage and puts the device in reset if the supply voltage drops below the required level. The voltage level to monitor is programmable to various levels between 1.6V and 3.0V so it will match the minimum application supply voltage. This ensures that program execution does not continue when the supply voltage is too low to guarantee correct operation.
The Watchdog Timer (WDT) monitors program operation and makes it possible to recover from program error situations such as run-away or dead-lock code.
The external oscillator failure detection (XOSCFD) function monitors the external clock source and PLL, and will issue an interrupt and switch to the 2 MHz internal oscillator if the clock fails. It makes it possible to safely recover from situations where the external clock source fails.

Together, these functions protect your applications and ensure safe and reliable operation.