Description:

Performs the logical OR between the contents of register Rd and register Rr and places the result in the destination register Rd.

Operation:

(i)Rd ← Rd v Rr

Syntax:Operands:Program Counter:

(i)OR Rd,Rr0 ≤ d ≤ 31, 0 ≤ r ≤ 31PC ← PC + 1

16-bit Opcode:

0010

10rd

dddd

rrrr

Status Register (SREG) and Boolean Formula:

I

T

H

S

V

N

Z

C

-

-

-

0

-

S: N ⊕ V, For signed tests.

V:0

Cleared

N:R7

Set if MSB of the result is set; cleared otherwise.

Z:

Set if the result is $00; cleared otherwise.

R (Result) equals Rd after the operation.

Example:

or r15,r16 ; Do bitwise or between registers
bst r15,6 ; Store bit 6 of r15 in T flag
brts ok ; Branch if T flag set
...
ok: nop ; Branch destination (do nothing)

Words: 1 (2 bytes)

Cycles: 1