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Datasheet

PDF

软件

说明

AT40K05/10/20/40

AT40K05/10/20/40 Complete

(文件大小: 1.27MB, 55 页数, 修订版 E, 更新时间: 06/2013)

5K - 50K Gate FPGA with DSP Optimized Core Cell and Distributed FreeRam. (LV are mature)

AT40K05/10/20/40(LV)

AT40K05/10/20/40(LV) Datasheet Mature

(4 页数, 更新时间: 05/2002)

5K - 50K Gate FPGA with DSP Optimized Core Cell and Distributed FreeRam.

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This 5,000 to 10,000-gate coprocessor is a fully PCI-compliant, SRAM-based FPGA with distributed 10-ns programmable synchronous/asynchronous, dual-port/single-port SRAM, 8 global clocks, Cache Logic® ability (partially or fully reconfigurable without loss of data), and automatic component generators. It has a 128 I/O count and supports a 5-V design. It can be used as a coprocessor for high-speed (DSP/processor-based) designs by implementing a variety of computation intensive, arithmetic functions. It is designed to quickly implement high-performance, large gate count designs through the use of synthesis and schematic-based tools used on a PC or Sun platform.

关键参数

参数

F.max (MHz):

100 MHz

Max. Operating Freq. (MHz):

100 MHz

Max I/O Pins:

128

Speed:

-2

Registers:

256

Usable Gates:

5K - 10K

Memory:

2048

 

订购码 封装 操作范围 载体类型 样品 Atmel 商店可用性1 单价2 网上购买
AT40K05-2BQJ LQFP 144AA 144 Industrial (A) (-40°C to 85°C) 0 不同



1Backlog orders can be placed for items currently not available.
2Suggested retail price per unit for budgetary use only.